1. Field of the Invention
The present invention relates to a method for separating a substrate of a group III nitride semiconductor light-emitting device into a plurality of chips used in light-emitting devices such as blue light-emitting diodes, blue laser diodes, etc.
2. Description of the Related Art
FIG. 8 is a plan sectional view of a wafer showing the steps of a conventional separation method. FIG. 9 is a front sectional view taken along the line a9--a9 in FIG. 8, showing the steps of the conventional separation method.
As shown in FIG. 9, there is heretofore known a light emitting device using gallium nitride compound semiconductors in which: n layers 3 and 4, a light-emitting layer 5 and p layers 61, 62 and 63 are successively grown on a sapphire substrate 1. The light-emitting layer 5, the p layers 61, 62 and 63 and the n layer 4 are partially removed to partially expose the n layer 3. Electrodes 8 for the n layers 3 and 4 are formed on the thus exposed electrode-formation regions A, and electrodes 7 for the p layers 61, 62 and 63 are formed on upper surfaces of the player 63.
Japanese Unexamined Patent Publication No. Hei. 5-343742 describes a method for producing light-emitting device chips. This method is used in an etching process for forming the electrode formation regions A for the n layers. The method comprises the steps of: exposing the n layer 3 also in regions E to be processed by a blade 40 to perform device separation; dicing the n layer 3 up to the sapphire substrate 1 with the blade 40 in the exposed regions E to be processed; and then dicing or scribing the sapphire substrate 1 to separate the sapphire substrate 1 into respective chips.
In the separation method using the aforementioned method, etching is performed so that the electrode formation regions A for the n layer 3 and the regions E to be processed by the blade 40 become continuous, and dicing is performed along a processing line 20 in the regions E which are to be processed and in which the n layer 3 is exposed. In the dicing step, however, cracks C are generated in the n layer 3 because of the rotation force of the blade 40 so that the cracks C reach the lower portions of the electrodes 8. As a result, the cracks C are interposed in current paths for the n layer 3. Accordingly, the cracks C lower the quantity of supply current and cut off current paths, etc. Accordingly, the production yield, the light-emitting efficiency and the device life are lowered.